I have been building an FPGA FM receiver for quite a while now – I have had too many hobby projects running at the same time. Just for the sport I have decided to do the downconversion in digital domain – as a downside the ADC sample rate is then quite high even when undersampling. I plan to keep a GNU Radio design as the golden reference to aid debugging. However, this created another problem; how to sample a few seconds of the high sample rate data so that I can process it with a computer?
I decided that this would be a perfect excuse to learn some embedded Linux so I ordered a Terasic DE10-Nano board from Mouser. My plan was to store the data to the SDRAM memory and then use the on-chip hard processor (HPS) to transfer it to my PC.
The best place to get started is the Golden Reference Hardware Design (GHRD) for the DE10-Nano board. It worked fine. After that I tried to compile all the GHRD stuff myself using a tutorial from Bitlog, which is basically a practical and compressed version of a Rocketboards.org guide.
However, the GHRD just blinks a few LEDs by sending commands from HPS, and I want to send information the opposite way. I was able to figure the rest out with the help of a wiki page from Critical Link. Basically I use the modular SGDMA dispatcher and write master components to adapt the streaming output of my block to the F2H-SDRAM interface. The H2F is used to configure the DMA blocks. My advice is that you should just use these blocks instead of trying to write your own. You don’t need any fancy drivers if you are happy using devmem. You can then copy all the memory mapping stuff from the devmem source code.
In addition I have routed a few of the FPGA IOs to the I2C core on the HPS side. It is used to control the sampling clock generator. The FPGA design is basically just a FIFO for clock domain crossing.
Even though Altera forums are full of threads where people are struggling with the FPGA-HPS interconnect I found out that it more or less works just like you would assume as long as you do not try to take any shortcuts. For example, make sure to regenerate the preloader every time you change some of the HPS properties.
I am able to access the HPS shell with the USB serial port connection to initiate a data logging event. I then redirect the output to a text file which I can download to my computer over an SFTP connection. I can also use the SFTP connection to send programs the cross-compiled programs onto the board.
2 thoughts on “Embedded Linux datalogger”
can you send me your project? I m working in a project in which i need to stoer data comming from FPGA on ddr3 memory connected to HPS.
here is my email : firstname.lastname@example.org
I’m new to altera FPGA’s and wanted to try and log data from ADC as you described. Is there a project to your project? In particular I’m interested at the software side of it.
my e-mail is: email@example.com
Thanks in advance,