Embedded Linux datalogger

I have been building an FPGA FM receiver for quite a while now – I have had too many hobby projects running at the same time. Just for the sport I have decided to do the downconversion in digital domain – as a downside the ADC sample rate is then quite high even when undersampling. I plan to keep a GNU Radio design as the golden reference to aid debugging. However, this created another problem; how to sample a few seconds of the high sample rate data so that I can process it with a computer?

I decided that this would be a perfect excuse to learn some embedded Linux so I ordered a Terasic DE10-Nano board from Mouser. My plan was to store the data to the SDRAM memory and then use the on-chip hard processor (HPS) to transfer it to my PC.

The best place to get started is the Golden Reference Hardware Design (GHRD) for the DE10-Nano board. It worked fine. After that I tried to compile all the GHRD stuff myself using a tutorial from Bitlog, which is basically a practical and compressed version of a Rocketboards.org guide.

However, the GHRD just blinks a few LEDs by sending commands from HPS, and I want to send information the opposite way. I was able to figure the rest out with the help of a wiki page from Critical Link. Basically I use the modular SGDMA dispatcher and write master components to adapt the streaming output of my block to the F2H-SDRAM interface. The H2F is used to configure the DMA blocks. My advice is that you should just use these blocks instead of trying to write your own. You don’t need any fancy drivers if you are happy using devmem. You can then copy all the memory mapping stuff from the devmem source code.

Platform designer view of my datalogger

In addition I have routed a few of the FPGA IOs to the I2C core on the HPS side. It is used to control the sampling clock generator. The FPGA design is basically just a FIFO for clock domain crossing.

Even though Altera forums are full of threads where people are struggling with the FPGA-HPS interconnect I found out that it more or less works just like you would assume as long as you do not try to take any shortcuts. For example, make sure to regenerate the preloader every time you change some of the HPS properties.

I am able to access the HPS shell with the USB serial port connection to initiate a data logging event. I then redirect the output to a text file which I can download to my computer over an SFTP connection. I can also use the SFTP connection to send programs the cross-compiled programs onto the board.

Playing music using floppy drives, revisited

Playing music on floppy drives is nothing new. The Moppy project has been popular for a few years now, and it was the project that initially caught my attention as well. However, I though that it lacked a certain sense of elegance; FPGA would be much better in generating the waveforms for a bunch of floppy drives at the same time. That project also combines Arduino and Java, both of which are not my favourite things in the world. It also requires a PC.

So I decided to roll an implementation of my own. Last summer I programmed the midi parser on an ARM microcontroller, which sent the data to the FPGA via SPI. The basic VHDL block consists of nothing more than a counter and a lookup table. Eight of these blocks were instantiated in a higher level block and connected to a SPI block which was trivial to program.  The MIDI file was hard-coded in the program memory of the microcontroller as a C array. It worked, but it was certainly not satisfied. There’s no need to have anything besides a single FPGA, and the project must have an user interface. Changing the song was too hard in the old version.

In late 2013 I dug up my Terasic DE2 board, which is on loan from my university (thanks TUT!). It’s been a while since my VHDL and SoC classes but I was able to create a QSys system in a short time. Of course, I also had to wrap my HD44780 and waveform generation blocks to use Altera’s Avalon bus. I was really amazed how smoothly everything went.

IPs connected in QSys
IPs connected in QSys

Besides the aforementioned blocks I also used Altera’s SD card IP. It didn’t work with my SDHC card, but an old 128 MB SD card worked fine. I can just save mid files on the SD card and choose the song to play from the HD44780 LCD screen. User input is given using pushbuttons (parallel IO).

HD44780 LCD showing the MIDI files on SD card.
HD44780 LCD showing the MIDI files on SD card.

 

The “music” waveforms are output from the GPIO header and fed to a 74LVC245 buffer. Besides buffering, it also converts the 3.3V signals to 5V. The buffer outputs are directly connected to the floppy drives using 10-pin IDC cables and a simple adapter PCB. The PCB also has an LED indicating power – it also turned out that the current draw of the motors made them flicker in a nice way.

My PCB which brings out all the signals in a single 10-pin connector.
My PCB which brings out all the signals in a single 10-pin connector.
Buffer PCB
Buffer PCB

That’s all there was to it really. I think this is as far as I’ll go with this as I think my solution is now elegant enough and I’m sick of hoarding floppy drives. Possible improvements would be combining the channels and floppy drives more intelligently (not all floppy drives are the same and play at the same volume  – some sound much more ugly than the others). Sometimes beautiful melodies are hidden beneath the grunting sounds from the other drives.

Here’s a few songs I recorded.


Playing music using floppy drives

The Moppy project, which enables an Arduino to use floppy drives to play music, is something a lot of people have tried, but I was not comfortable with installing Netbeans to run the Java app. Instead, I built my own system from scratch.

I used my NXP LPC1768 dev board “LandTiger” for all the complex stuff. It had the MID file in its memory as an array, parsed it and sent the notes over SPI.

A Micronova Mercury FPGA board received the notes and generated the waveforms to play the notes. I used an FPGA so that I could utilize its parallelism for the waveforms and to prevent my VHDL skills from rusting. A neater way would have been to replace the microcontroller with a softcore one inside the FPGA, but I didn’t feel the need as I was just dicking around.

Regrettably, this video is the only piece of evidence I have left. Well, the system consisted of a lot of software and a few wires, so there was nothing much to see.